RFX8055

CMOS 5GHz WLAN 802.11a/n/ac RFeIC WITH PA, LNA, AND SPDT


Please note: RFX8055 is being discontinued and is not recommended for new designs.



RFX8055 is a highly integrated, single-chip, single-die RFeIC (RF Front-end Integrated Circuit) which incorporates key RF functionality needed for IEEE 802.11a/n/ac WLAN systems operating in the 5.1-5.95GHz range. The RFX8055 architecture integrates a high-efficiency high-linearity power amplifier (PA), a low noise amplifier (LNA) with bypass, the associated matching network, LO rejection, and harmonic filters all in a CMOS singlechip device.

RFX8055 has simple and low-voltage CMOS control logic, and requires minimal external components. A directional coupler based power detect circuit is also integrated for accurate monitoring of output power from the PA.

RFX8055 is assembled in an ultra-compact low-profile 2.3x2.3x0.4 mm 16- lead QFN package. With support to direct battery operation, the RFX8055 is ideal RF front-end solution for implementing 5GHz WLAN in smartphones and other mobile platforms.

Specifications

Frequency (GHz) Min.5.15
Frequency (GHz) Max.5.85
Typ. Current @ VDD = 3.3 V 17.5dBm (mA)225/185
Typ. Current @ VDD = 3.6 V 17.5dBm (mA)
Typ. Current @ VCC = 3.6 V (mA)
Typ. POUT @ 3.0% EVM (dBm)
Typ. Current @ VCC = 5 V (mA)
802.11 WLAN Standarda/n/ac
Antenna Ports
Architecture
Typ. POUT @ 2.5% EVM (dBm)
Typ. Tx Gain (dB)26
Typ. POUT (dBm)16.5 @ -35dB EVM
17.5 @ -30dB EVM
VDD (V)3.0-3.6
VCC (V)
Package
Package (mm)2.3 x 2.3 x 0.4

Features

  • 5GHz WLAN Single Chip, Single-Die RF Front-End IC
  • High Transmit Signal Linearity Meeting Standards for 802.11ac OFDM /MCS9 Modulation
  • Separate TX, RX Transceiver Ports, Single Antenna Port
  • 5GHz Power Amplifier with Low-Pass Harmonic Filter
  • Low Noise Amplifier with Bypass Mode
  • Transmit/Receive Switch Circuitry
  • Integrated Power Detector for Transmit Power Monitor and Control
  • Low Voltage (1.2V) CMOS Control Logic
  • Low-Current Mode in TX for Battery Current Savings
  • ESD Protection Circuitry on all Pins
  • DC Decoupled RF Ports
  • Internal RF Decoupling on All VDD Bias Pins
  • Low Noise Figure for the Receive Chain
  • High Power Capability for Received Signals in Bypass Mode
  • Low DC Power Consumption
  • On-chip Matching Circuit with 50Ω Input/Output
  • Minimal External Components Required
  • Market Proven Bulk CMOS Technology
  • 2.3mm x 2.3mm x 0.4mm Small Outline 16L QFN Package with Exposed Ground Pad
  • RoHS and REACH Compliant

Product Documents