SKY74068-21

Dual-Band Transmitter for CDMA and PCS Femtocell Applications

The SKY74068-21 transmitter is a highly integrated device for dual-band Code Division Multiple Access (CDMA) femtocells. The SKY74068-21 supports femtocells in the cellular CDMA and Personal Communications System (PCS) modes.

The device requires a minimum number of external components to complete a CDMA radio subsystem. Included on-chip are the baseband filter, direct upconversion In-Phase and Quadrature (I/Q) mixers, variable gain power amplifier (PA) drivers, a fully integrated Voltage Controlled Oscillator (VCO) with Local Oscillator (LO) generation blocks, and a dual-mode fractional-N/integer-N Phase Locked Loop (PLL).

External components needed for operation include bias resistors, bypass capacitors, and passives to comprise the PLL loop filter.

The signal enters the chip as an analog baseband I/Q signal. It is filtered by the baseband filter and upconverted to the desired RF transmit frequency. The signal is amplified by one of two upconverters, depending on whether the chip is operating in cellular or PCS mode. The resulting signal is fed through the appropriate PA driver stage to provide variable output power and to drive the external PA. The signal is then filtered by an external Surface Acoustic Wave (SAW) filter and sent to the PA to obtain the final rated power.

Data Sheets

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Specifications

DescriptionDual-Band Transmitter for CDMA and PCS Femtocell Applications

PackageRFLGA, 32-pin

Package (mm)5 x 5 x 1

Features

Low power consumption in all operating modes
Direct upconversion architecture
Device controlled using a three-wire read/write serial bus interface with independent supply voltage
Baseband RC filter to reject receive band noise
Fully integrated VCO with auto-tuning
Dual-mode fractional-N/integer-N PLL
Variable gain PA drivers
Differential cellular driver output matched to 200 
Single-ended PCS driver output matched to 50 
Transmit power control with >75 dB dynamic range
Low current consumption at low transmit power minimizes current consumption and noise
Hardware TX_ENABLE for gated mode operation
RFLGA™ (32-pin, 5 x 5 x 1 mm) package with downset paddle (MSL3, 260 °C per JEDEC J-STD-020)

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