Precision Clock EVB Software Release Notes Copyright (C) 2013 Silicon Laboratories ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Use with the following devices: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Si5316 Si5319 Si5322 Si5323 Si5324 Si5325 Si5326 Si5327 Si5328 Si5365 Si5366 Si5367 Si5368 Si5369 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Use with the EVBs: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Si5316-EVB Si5319-EVB Si5322-23-EVB Si5324-C-EVB Si5325-26-EVB Si5326-VTSS-EVB Si5327-EVB Si5328-EVB Si5365-66-EVB Si5367-68-EVB Si5369-EVB ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This release contains the following: ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - DSPLLsim for the Si531x/2x/6x - Register Programmer - Register Viewer - Setting Utility - User Guide - Precision Clock EVB Driver (USBXpress Driver) Version 3.3 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ PC System Requirements ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - Microsoft Windows XP, Vista, 7 - USB 2.0 - 4 MB of hard drive space - Microsoft .NET Framework 4.0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Revision History ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 5.1 (July 2014) - Small issue when reading an existing register map. - Si5319 Free run mode fix. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 5.0 (July 2013) - Added Si5328 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.8 (March 2013) - Added ~60MHz XA-XB range - Fixed bug that would not allow register maps to be parsed correctly ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.7 (March 2012) - For Si5369 devices added the FASTLOCK setting to the Register Map. - Removed registers 12, 13, 14 and 15 from the Register Map for Si5369 devices since they are undefined - Added a "force inexact mode" option to Free Run mode. This allows the user to obtain Free Run Mode solutions that exclude CKIN1 - Added a user input for Fin when "Read from device" is selected and using a Si5327 device. - Increased the range of the minimum f3 control when CLKIN is < 16KHz. Added labels to the minimum f3 control to describe the valid range of values. - Fixed a bug that resulted in a "divide by 0" error message when reading a frequency from a device that is programmed with certain frequency plans. - Fix a bug that resulted in the most significant bit and the least significant bit LOSx_EN being swapped - Fixed a USB interface bug that resulted in intermittent USB errors when running on Windows 7 64-bit systems. - Added version checking to notify the user when a new DSPLLsim version is available for download from the Silicon Laboratories website. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.6 (December 2011) - Upgraded to Microsoft .NET Framework 4.0 and Windows 7 64-bit - Updated the USBXpress (Precision Clock EVB Driver) to 3.3 - Added register map file read to DSPLLsim - Streamlined the start-up dialog boxes for DSPLLsim - Removed XML file save feature from DSPLLsim ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.5.1 (June 13, 2011) -Made the default reference frequency for the Si5324 to 114.285MHz ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.5 (May 2011) - Added Si5327/69 - Added fast lock to some devices - Removed SLEEP control - Updated the SFOUT control options - Updated the reference oscillator (XA-XB) frequency options - Removed GRADE_RO DSPLLsim: - Updated f3 max for wideband devices - Added frequency plan information to header in text file - Made frequency planning more accurate by using floating point numbers for the frequencies - Assigned the input frequency to 19.44MHz for the default Si5326 option - Added fosc column to inexact and free run wizards when answers are reported ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.0.4 (November 9, 2009) - Set LOCKT = 1 by default for the Si5324 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.0.3 (October 21, 2009) - Fixed the file save problem for the Si5324 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.0.2 (October 13, 2009) For the DSPLLsim: - Updated the wideband-related f3 frequency and loop bandwidth calculations - Added missing control bits in register 20 to the Status tab - Enhanced the inexact mode algorithm to run faster at lower frequencies ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.0.1 (May 21, 2009) - Added write to EEPROM function in the DSPLLsim ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4.0 (April 17, 2009) - Added the Si5324 - Fixed frame sync features for the Si5368 - Enhanced the main input to output frequency control in the wizards - Added Read button to the Status tab of pin-controlled devices - Added more help information to the wizards ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 3.2 (November 25, 2008) - Updated the Precision Clock EVB driver to use USBXpress version 3.1 - Updated the installer for the Precision Clock EVB Software - For the DSPLLsim, fixed frame synchronization configuration bugs - For the DSPLLsim, updated the wizard for more accurate frequency planning - In the DSPLLsim, extended the output frequency range of the Si5323/65 to 2000 Hz, instead of 10MHz - Removed the FXDLY feature - Fixed various bugs and typos in the software - Added the input frequency and time stamp to the output files in the DSPLLsim ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 3.1 (April 28, 2008) - For the DSPLLsim, made sure that N32 is used for the Si5319. - Updated the find dividers algorithm in DSPLLsim to ensure that fvco is calculated accurately and that the inexact mode works with smaller input frequencies (less than 1MHz) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 3.0 (March 14, 2008) For the DSPLLsim: - Added the free run mode frquency planwizard - Added the inexact mode to the existing frequency plan wizard - Updated the CLAT and INDENPENDENTSKEW controls to provide the conversions to the actual time values - Added the LOS_EN controls - Debugged the read from device option so that it is more reliable - Updated the help and installation instructions - Removed the register map documentation files from the installation (see http://www.silabs.com for these files) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 2.0 (December 10, 2007) For the DSPLLsim: - Made the Si5316 frequency plan wizard consistent with the other pin-controlled devices' frequency plan wizard - Added LOCKT back into the software and updated the options - Updated VALTIME options - Updated for the Revision C silicon changes - Added Si5319 - Updated SFOUT - Updated FLAT to change dynamically as the bandwidth changes - Added settings file capability back into the software ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 1.3 (September 18, 2007) For the DSPLLsim and Setting Utility: - Removed LOCKT - Added ICAL button - Updated help documentation - Updated text in the GUI - Removed settings file capability until later - Updated FOSREFSEL options - Updated RATE options ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 1.2 (July 10, 2007) In the DSPLLsim: - Updated the loop bandwidth calculations - Refined and updated the pin-controlled device frequency wizard interface and computation - Made LOCKT changeable based on BWSEL_REG for the MCU-controlled devices - Refined the interface to make it more intuitive - Added the phase offset resolution for use with independent skew in the frequency plan for the MCU-controlled devices - Added check to verify that the selected device is what is actually connected to the EVB when the program connects - Changed the LEDs in the status tabs to yellow and gray color scheme - Made the default AUTOSEL to be automatic revertive after the frequency plan is defined Other: - Allowed for multiple EVBs to be connected to the same PC at the same time using any of the Precision Clock EVB software - Changed the Online and Offline terms to Connected and Disconnected - Added external mode feature in the Register Programmer - Updated the help documentation ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 1.1 (May 4, 2007) - Added Setting Utility to the software package - In the DSPLLsim, updated the Si5316 frequency planning, reformatted the output clock frequency ratios for the Si5325/26/67/68 frequency planning wizard, added the operating range to the frequency plan solution, and set the BWSEL to the best valid loop bandwidth for every frequency plan. - Update the help documentation ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 1.0 (March 23, 2007) - Added all devices to the DSPLLsim - Updated the help documentation ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 0.2 (February 8, 2007) - Added device control in the DSPLLsim - Added the Si5326 to the available part to control in the DSPLLsim - Added more file operations to the DSPLLsim - Added polling to the DSPLLsim - Updated the help documentation