Si537x Precision Clock EVB Software Release Notes
Copyright (C) 2012 Silicon Laboratories


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Use with the following devices:
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Si5374
Si5375
Si5376


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Use with the EVBs:
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Si5374-EVB
Si5375-EVB
Si5376-EVB

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This release contains the following components:
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- DSPLLsim for the Si5374/5/6
- Register Programmer
- Register Viewer
- Setting Utility
- User Guide
- USBXpress Driver (Precision Clock EVB Driver) - Version 3.3


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PC System Requirements
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- Microsoft Windows XP, Vista, 7
- USB 2.0
- 4 MB of hard drive space
- Microsoft .NET Framework 4.0
- EVB Driver (USBXpress 3.3)
- PDF Reader


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Revision History
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Version 3.1 - April 3, 2013

- Changed default LOCKT from 1 to 4 for the Si5374
- Fixed bug that would not save frequency plan solutions for inexact or free run mode in the wizard

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Version 3.0 - November 8, 2012

- Added Si5376 device
- Updated user guide


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Version 2.3 - April 9, 2012
- Added the ability to disable automatic VCO management using a check box on the advanced dialog panel
- Changed the operation of the free run check box on the advanced dialog panel by a) adding a note explaining that this check box does not configure N32 based on the OSC frequency and b) making N32 = N31 in the resulting frequency plan.
- Added a "force inexact mode" option to Free Run mode.  This allows the user to obtain Free Run Mode solutions that exclude CKIN1
- Fixed a bug that disabled (tristate) the signals on the EVB that drive the CS_CA pins during initialization.  Although, the software would later correctly enable them they should be enabled at initialization for the si5375.  In addition, the software was changed to independently set/clear each CS_CA pin based on which DSPLLs were being configured.
- Fixed a USB interface bug that resulted in intermittent USB errors when running on Windows 7 64-bit systems.
- Added version checking to notify the user when a new DSPLLsim version is available for download from the Silicon Laboratories website.
- Replace the use of the file tempRegMap.txt that was written to the Program Files directory with the use of a temporary file.  This was changed because the use for the Program Files directory results in a permission error in 64-bit Windows 7 if the application is not run as an administrator.
- For the Si5374 make the default bandwidth selection equal to the greatest value less than 120Hz
- Corrected the labels for the CMOS Output Drive GUI control.
- Added inexact mode details including actual output clock multiplication ratios and the error between actual and desired CLKOUT in the report for each DSPLL


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Version 2.2 - December 14, 2011
- Update and sign the driver to work on 64-bit systems (version 3.1 to 3.3)
- Update the software to work on 64-bit systems


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Version 2.1 - November 4, 2011
- Updated the frequency planning algorithms to configure more
  accurately the DSPLLs
- Updated the default register map values
- Fixed bugs in the frequency planning wizards
- Changed the name of inexact mode to Advanced Mode
- Upgraded to Microsoft's .NET Framework 4.0

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Version 2.0 - May 11, 2011
- Updated RATE_REG options and added support for 40MHz
- Added free run and inexact mode wizards for frequency planning
  to Si537x DSPLLsim
- Added file IO to Si537x DSPLLsim
- Updated register map file format for Setting Utility and Si537x DSPLLsim

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Version 1.3 beta - March 18, 2011
- Updated RATE_REG
- Updated register map file format
- Removed XML file option
- Updated the find dividers algorithm and wizard

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Version 1.2 beta - October 4, 2010
- Removed A2 control since it's not on the EVB
- Added individual pin reset control
- Updated CS_CA pins correctly for Si5375 in Si537x DSPLLsim
- Updated SFOUT options to match register map documentation
- Removed SLEEP control bit
- Remapped LOS_EN bits to match register map documentation