Si5388D

Si5388D Network Synchronizer Clock for SyncE, SONET/SDH/PDH, and IEEE 1588

Note: This product is not supported for new designs. Please select a NetSync™ network synchronizer clock instead for better performance, improved functionality and AccuTime™ IEEE 1588 software support.

The Si5388D clock, with internal servo algorithm, paired with the Si5388-SW protocol stack is a complete IEEE 1588 and SyncE solution targeting applications that use a centralized “pizza box” architecture.

The Si5388D is a network synchronizer clock for Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. Utilizing fourth-generation DSPLL technology, the Si5388D provides any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. No external loop filter components are required and the PLL bandwidth is digitally programmable to values as low as 0.001 Hz. With phase jitter as low as 0.105 ps RMS, the Si5388D accepts 5 clock inputs ranging from 0.000001 - 750 MHz and generates up to 8 clock output frequencies ranging from 0.000001 MHz to 350 MHz.

The Si5388D meets all of the requirements specified by ITU-T G.8262 EEC Options 1 & 2, ITU-T G.8262.1, G.812 Type III & IV, G.813 Option 1, and Telcordia GR-1244 and GR-253 (Stratum 3/3E). When used with external IEEE 1588 stack and servo loop software, the Si5388A meets the requirements of ITU-T G.8273.1 and G.8273.2 (T-BC, T-TSC).

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Specifications

Loop Bandwidth Max (MHz)0.001

Temperature Range Min (°C)-40

Input Frequency Min (MHz)0.000001

Package TypeLGA64

OPNSi5388D-A00001-GM

ControlSPI

Line Impedance Match0

Clock Generatorsfalse

Jitter Attenuating Clockstrue

Number of Outputs8

Input Frequency Max (MHz)750

Intel x86 Clocksfalse

Real Time Clockfalse

Package Size (mm)9x9

Description2-PLL Network Synchronizer clock for IEEE 1588v2

Frequency ReferenceExternal

4G/LTE Wireless Clocksfalse

56G SerDesfalse

VDDO (V)3.3

Ouput Format(s)CML; HCSL; LVCMOS; LVDS; LVPECL

VDD (V)1.8 3.3

Jitter Recommended Range (fs)<

Phase Jitter (ps RMS)0.105

PCI Expressfalse

Spread Spectrumfalse

Synchronous Ethernet/1588true

DSPLLs2

Reference Inputs5

Xtal Input Frequency48

Output Format CategoriesDifferential; Single-Ended

Standards ComplianceG.8373.2 T-BC T-TSC, G.8262 EEC Option 1

Output Frequency Min0.000001

Embedded Xtaltrue

Loop Bandwidth Min (MHz)0.004

Temperature Range Max (°C)85

Output Frequency Max350

Supported for New DesignsNo

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Evaluation Kits

si5389-evb

Si5388/89 Network Synchronizer Clock Evaluation Kit

The Si5389-EVB kit and tools make it easy to configure and evaluate a complete PTP solution.

cbprog-dongle

ClockBuilder Pro Field Programmer

When used with ClockBuilder Pro software, the ClockBuilder Pro Field Programmer makes it simple for systems designers to develop, program, and debug any Si5332/8, Si5350/1/6/7, Si534x/6x/8x/9x, Si540x, Si55xx, SKY6210x, SKY6310x, SKY6900x, and SKY6910x part family clock devices “in-system,” or in one of the convenient QFN or LGA sockets. The field programmer supports I2C or SPI interfaces to the host system, and SPI to the field programmer's QFN or LGA socket boards.

MSRP $149.00

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