)
)
)
Features
- High-efficiency: PAE = 35% @ +28 dBm
- High linearity: +28 dBm with < -50 dBc ACLR with pre-distortion (40 MHz LTE, 8.5 dB PAR signal)
- High gain: 35 dB
- Excellent input and output return loss: to 50 Ω system
- Integrated active bias: performance compensated over temp
- Integrated enable On/Off function: PAEN = 1.5 to 2.5 V
- Single supply voltage: 5.0 V
- Pin-to-pin compatible PA family supporting all 3GPP bands
- Compact (16-pin, 5 X 5 X 1.3 mm) package (MSL3, 260 °C per JEDEC J-STD-020)
Images & Diagrams
Specifications
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- 2.3-2.7
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- 2.63
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- 37
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- 35.5
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- NA
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- 33
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- 28
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- 5
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- 90
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- MCM, 16-pin
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- 5 x 5 x 1.3
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