
Features
- Input voltage range: 2.7 to 5.5 V
- Dynamic output voltage: 0.4 V to 4.25 V
- 0.16 V to 1.7 V reference input range
- 2.5 times the reference input voltage to regulator output gain
- Internally compensated current/mode architecture:
- 2 MHz switching frequency
- 2.2 μH chip inductor
- Two 4.7 μF output capacitors
- Wide duty cycle range (100% duty cycle operation)
- Integrated 85 mΩ (typical) bypass regulator
- Less than 10 μs response for 1 V output step
- Up to 2 A typical output current
- Small 9-bump WLCSP package (MSL1, 260 °C per JEDEC J-STD-020) package
Images & Diagrams
Specifications
-
- Min. VIN (V)
- 2.7
-
- Max. VIN (V)
- 5.5
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- Min. VOUT (V)
- 0.4
-
- Max. VOUT (V)
- 4.25
-
- IOUT (mA)
- 2000
-
- fOSC (kHz)
- 2000
-
- Typ. IQ (μA)
- 135
-
- Package
- WLCSP, 9-bump
-
- Package (mm)
- 1.420 x 1.490 x 0.650
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