SKYA21004

Three-Channel LCD Bias Power Management IC with Three-Channel High-Efficiency White LED Driver

Please note: this product is being discontinued and is not recommended for new designs.

The SKYA21004 consists of a power management block supplying LCD bias rails and a three-channel backlight driver.

The LCD bias power management block of the SKYA21004 includes a boost converter that supplies main analog voltage (AVDD) of the panel, two charge-pump controllers supplying a gate-on voltage (VGH), and a gate-off voltage (VGL) to the LCD panel. The boost converter uses a 1.3-MHz fixed frequency to generate AVDD voltage up to 14.5 V. Two charge-pump controllers can generate up to +30 V and down to 30 V from the charge-pump stages configured by diodes and capacitors. A proprietary regulation algorithm can minimize the output ripple.

The backlight driver of the SKYA21004 integrates the boost converter to drive the LED voltage up to 28 V. The switching frequency is adjustable from 600 kHz to 2 MHz for system integration flexibility, which optimizes the efficiency and controls EMI. Three precision current sinks are programmable to drive LED current up to 120 mA per string.

The backlight driver of the SKYA21004 supports Analog Pulse Width Modulation (APWM) dimming, Direct Pulse Width Modulation (DPWM) dimming, and analog dimming (through I2C).

In the DPWM dimming mode, the output waveform follows the duty and the frequency of control input signal from the PWM pin. In the APWM dimming mode, the LED current of each channel is controlled by the input duty of PWM input signal, the I2C programmed brightness level, and the external RISET resistor.

The PWM pin can accept the frequency range from 100 Hz to 25 kHz with 10-bit resolution of duty control and 8-bit resolution of current control. When the PWM pin is not used, it needs to be pulled high.

The SKYA21004 is available in a 7 mm  4 mm, 36-pin QFN package.

Data Sheets

Talk to Sales ECAD Model

Specifications

PackageQFN, 36-pin

Package (mm)7 x 4

Features

LCD bias power (AVDD boost)
- Input supply range: 2.8 V to 5.5 V
- 1.3 MHz fixed frequency boost regulator
- Adjustable voltage up to 14.5 V (±1% typical accuracy)
- Short-circuit, over-voltage, and over-temperature protection
Positive/negative gate drive (VGH/VGL)
- Up to 13.2 V input supply (VDD)
- Adjustable voltage up to 30 V @ 20 mA (VGH)
- Adjustable voltage down to 30 V @ 20 mA (VGL)
LED driver
- Input supply range: 2.8 V to 5.5 V
- Adjustable operating frequency: 600 kHz to 2 MHz
- Dimming control options:
  - 8-bit resolution on LED current control – I2C interface
  - Direct PWM dimming (10-bit resolution of PWM duty control)
  - Analog PWM dimming (9-bit resolution of PWM duty control)
  - Programmable maximum LED current (30 mA to 120 mA)
per channel
Up to 28 V, 120 mA per channel
Accuracy matching: ±2.5% @ 60 mA
Fade in/out feature for current control
PWM input range: 100 Hz to 25 kHz
LED open/short detection, boost over-voltage/current protection, over-temperature protection
AEC-Q100 qualification in process
QFN (36-pin, 7 mm x 4 mm, 0.5 mm pitch) package (MSL3, 260 ºC per JEDEC J-STD-020)

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