Si5518A

NetSync™ Low Phase Noise Jitter Attenuating Clock for 5G/eCPRI/SyncE/IEEE


The Si5518A NetSync™ Network Synchronizer Clock utilizes fifth-generation DSPLL™ and MultiSynth™ technologies and combines the functions of a SyncE/IEEE 1588 PTP network synchronizer clock with a low phase noise 5G/eCPRI wireless jitter attenuator supporting JESD204B/C into a single IC device.

The Si5518A is optimized for 5G wireless applications which demand the highest level of integration and phase noise performance with low power consumption that reduces the total solution cost. This highly integrated digital solution eliminates external loop filter components and has high immunity to external board disturbances such as power supply noise. The DSPLL bandwidth is digitally programmable to values as low as 0.001 Hz. With phase jitter as low as 47 fs RMS, the Si5518A accepts 4/6 inputs clock ranging from 0.008 - 1000 MHz differential and PPS/PP2S, 8kHz to 250MHz for CMOS. Si5518A generates up to 18 clock outputs that are configurable in any combination of DCLK, SYSREF or other system clocks. Each output supports delay/skew adjust and frequencies ranging from PPS/PP2S up to 3200 MHz.

The Si5518A meets all the requirements specified by ITU-T G.8262 EEC Options 1 & 2 and ITU-T G.8262.1. When used with external IEEE 1588 stack and servo loop software the Si5518A meets the requirements of ITU-T G.8273.2 (T-TSC, T-BC), ITU-T G.8273.4 (T-BC-P, T-BC-A, T-TSC-P, T-TSC-A) and G.8273.1 (T-GM). Si5518A does not support AccuTime™ IEEE 1588 software. Customers interested in using Skyworks AccuTime™ IEEE 1588 software should select a Si5518 grade that supports AccuTime™.

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Specifications

DescriptionNetwork Sync & JA Clock for IEEE 1588v2/SyncE with JESD204B/C
OPNTBD
Package TypeQFN72
Package Size (mm)10x10
4G/LTE Wireless Clockstrue
5G Clockstrue
56G SerDesfalse
Automotivefalse
Clock Generatorsfalse
Clock outputs18
ControlSPI
DSPLLs4
Input Frequency Max (MHz)1000
Input Frequency Min (MHz)0.0000005
Intel x86 Clocksfalse
Jitter Attenuating Clockstrue
Jitter Recommended Range (fs)<=100
Line Impedance Match0
Loop Bandwidth Min (MHz)0.000000001
Loop Bandwidth Max (MHz)0.004
Output Format CategoriesDifferential; Single-Ended
Ouput Format(s)LVDS, S-LVDS, AC coupled LVPECL, LVCMOS, HCSL, CML
Output Frequency Domains3
Output Frequency Max3200
Output Frequency Min0.0000005
PCI Expressfalse
Phase Jitter (ps RMS)0.047
Real Time Clockfalse
Reference Inputs6
Reference TypeExternal
Spread Spectrumfalse
Standards ComplianceITU-T G.8273.2 (T-TSC, T-BC), ITU-T G.8273.4 (T-BC-P, T-BC-A, T-TSC-P, T-TSC-A), G.8262 (EEC Options 1 and 2), G.8262.1 (eEEC), and G.8273.1 (T-GM)
Synchronous Ethernet/1588true
Temperature Range Max (°C)95
Temperature Range Min (°C)-40
VDD (V)1.8; 3.3
VDDO (V)1.8; 2.5; 3.3
Wireline or Wireless ApplicationWireless
XTAL Inputtrue
Xtal Input Frequency54
AccuTime™ Supportedfalse

Product Documents

Quality and Packaging

Look up product's green / pb-free status and information on RoHS, REACH, Halogen Free, and PFIS.

Certificate of Performance

Evaluation Kits

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SI55xx-A-EVB

Si5518/12 NetSync™ Network Synchronizer Clocks and Si5510/08 Wireless Jitter Attenuator Clocks Evaluation Kit

The Si55xx-A-EVBs make it easy to move from ClockBuilder Pro device configuration to hands-on performance evaluation. Si55xx-A-EVB can be used to evaluate any Si5518/12/10/08 clocks. MSRP $850.00
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cbprog-dongle

ClockBuilder Pro Field Programmer

When used with ClockBuilder Pro software, the ClockBuilder Pro Field Programmer makes it simple for systems designers to develop, program, and debug any Si5332/8, Si5350/1/6/7, Si534x/6x/8x/9x, Si540x, and Si55xx part families clock device “in-system,” or in one of the convenient QFN sockets. The field programmer supports I2C or SPI interfaces to the host system, and SPI to the field programmer's QFN socket boards.

MSRP $499.00

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